1. Technical Field
Various embodiments generally relate to a semiconductor device, and more particularly, to a stacked memory device and system.
2. Related Art
In order to increase integration of a semiconductor apparatus, a 3 dimensional (3D) semiconductor apparatus has been proposed. A 3D semiconductor apparatus may include a plurality of chips stacked and packaged in a single package. The 3D semiconductor apparatus achieves maximum integration in a given space by vertically stacking two or more chips.
According to some 3D semiconductor apparatuses, a plurality of the same type of chips are stacked. The plurality of the same type of chips are coupled to one another through metal line like wires. In this way, the plurality of the same type of chips operate as a single semiconductor apparatus.
Some 3D semiconductor apparatuses may implement “Through Silicon Via” (TSV). The TSV may electrically couple all of a plurality of stacked chips by penetrating the plurality of stacked chips with “via”. A semiconductor apparatus having the TSV structure vertically penetrating and coupling each of the plurality of chips effectively reduces the size of the package better than a semiconductor apparatus utilizing the wire structure to couple each of the plurality of chips through, for example, edge-wiring.